1. Field of the Disclosure
The present implementations relate to methods and systems for depositing films, and more specifically, to providing temporally pulsed and kinetically modulated chemical vapor deposition (CVD) for gapfill applications, such as dielectric gapfill.
2. Description of the Related Art
As feature sizes shrink, achieving conformal deposition in high aspect ratio features becomes ever more challenging. For example, it is difficult to achieve good step coverage in gap features (e.g. trenches or holes) less than 25 nanometers wide with aspect ratios in the range of 1:20 to 1:30. One example where such gapfill is required is that of slit gapfill in 3DNAND to form, for example, isolation structures. In these applications, high aspect ratio structures called slits or channel holes, which can exceed 1:30 aspect ratios, need to be completely filled with high quality oxide without any airgaps or voids that may compromise performance (e.g. electrical isolation performance).
Traditional processes such as sub-atmospheric chemical vapor deposition (SACVD) or even furnace/single wafer atomic layer deposition (ALD) can leave large voids or seams at the interface. SACVD and its associated processes have well-known overburden or pinch off problems at the tops of gap features. For example, FIG. 1A illustrates a cross-section of a portion of a substrate 100 having a gap feature 102 (e.g. trench or hole). Deposition of a film 104 by a conventional chemical vapor deposition (CVD) process to fill the gap feature 102 produces higher deposition rates along higher portions of the sidewalls 104 and lower deposition rates along lower portions of the sidewalls 104. In other words, deposition rate increases with increasing depth in the gap feature 102. As shown at FIG. 1B, this can result in formation of a void 106 in the structure of the gapfill material, resulting from closure occurring at the top of the gap feature before gapfill is complete.
Some post-deposition processes (e.g. post-deposition anneal processes) have been developed to close such voids. However, such processes introduce an additional step that is detrimental to throughput.
Even carefully controlled ALD still leaves a seam at the interface of the two growing sidewalls, which may cause problems by exhibiting different behavior (e.g. higher etch rates) than other portions of the deposited film during subsequent processing steps. FIG. 1C illustrates a cross-section of the substrate 100 showing the gap feature 102 being filled using an ALD process. Conformal layers 110 are deposited in the gap feature 102, coating the bottom and sidewalls in successive deposition cycles to build up the thickness of the film over time. However, as shown at FIG. 1D, this does not produce a true bulk material as the closure of the sidewalls results in the formation of a seam 112. This seam 112 is essentially a microscopic interface within the gapfill that can cause problems during subsequent processing steps.
Introducing an etch process between ALD deposition steps seeks to ameliorate the issue of seam formation, but is only partially successful, and not cost-effective since overall throughputs plummet due to the addition of extra processing steps.
It is in this context that implementations of the disclosure arise.